C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 150

IC MCU 8BIT 8KB FLASH 24QFN

C8051F902-GM

Manufacturer Part Number
C8051F902-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F902-GM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QFN EP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1848-5
C8051F91x-C8051F90x
SFR Definition 14.2. PMU0MD: Power Management Unit Mode
SFR Page = 0xF; SFR Address = 0xB5
150
Name
Reset
Bit
4:0
Type
7
6
5
Bit
WAKEOE
MONDIS
RTCOE
RTCOE
Unused
Name
R/W
7
0
WAKEOE
Buffered SmaRTClock Output Enable.
Enables the buffered SmaRTClock oscillator output on P0.2. Only available on
‘F912 and ‘F902 devices.
0: Buffered SmaRTClock output is not enabled.
1: Buffered SmaRTClock output is enabled.
Wakeup Request Output Enable.
Enables the Sleep Mode wake-up request signal on P0.3. Only available on ‘F912
and ‘F902 devices.
0: Wake-up request signal is not enabled.
1: Wake-up request signal is enabled.
VBAT Supply Monitor Disable.
Writing a 1 to this bit disables the VBAT supply monitor. Writing a 0 to this bit when
the VBAT supply monitor is disabled will trigger a power-on reset. Only available on
‘F912 and ‘F902 devices.
Unused.
Read = 00000b. Write = Don’t Care.
R/W
6
0
MONDIS
R/W
5
0
R/W
Rev. 1.0
4
0
Function
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

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