C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 74

IC MCU 8BIT 8KB FLASH 24QFN

C8051F902-GM

Manufacturer Part Number
C8051F902-GM
Description
IC MCU 8BIT 8KB FLASH 24QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F902-GM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Package
24QFN EP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1848-5
C8051F91x-C8051F90x
SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte
SFR Page = 0x0; SFR Address = 0xBE
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte
SFR Page = 0x0; SFR Address = 0xBD;
74
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be zeros. This register
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be the least significant bits of
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
should not be written when the SYNC bit is set to 1.
the accumulator high byte. This register should not be written when the SYNC bit is set to 1.
ADC0[15:8] ADC0 Data Word High
ADC0[7:0]
Name
Name
7
0
7
0
Byte.
ADC0 Data Word Low
Byte.
6
0
6
0
Description
Description
5
0
5
0
Rev. 1.0
Most Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
Least Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
4
0
4
0
ADC0[15:8]
ADC0[7:0]
R/W
R/W
Read
Read
3
0
3
0
2
0
2
0
Set the most significant
byte of the 16-bit ADC0
Accumulator to the value
written.
Set the least significant
byte of the 16-bit ADC0
Accumulator to the value
written.
1
0
1
0
Write
Write
0
0
0
0

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