C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 193

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

SFR Definition 20.2. RTC0ADR: SmaRTClock Address
SFR Page = 0x0; SFR Address = 0xAC
SFR Definition 20.3. RTC0DAT: SmaRTClock Data
SFR Page= 0x0; SFR Address = 0xAD
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMn
Note: Read-modify-write instructions (orl, anl, etc.) should not be used on this register.
Name
Reset
Name
Reset
Type
Type
3:0
7:0
Bit
Bit
Bit
Bit
7
6
5
4
internal SmaRTClock register.
ADDR[3:0] SmaRTClock Indirect Register Address.
RTC0DAT SmaRTClock Data Bits.
AUTORD SmaRTClock Interface Autoread Enable.
Unused
SHORT
BUSY
Name
BUSY
Name
R/W
7
0
7
0
SmaRTClock Interface Busy Indicator.
Indicates SmaRTClock interface status. Writing 1 to this bit initiates an indirect read.
Enables/disables Autoread.
0: Autoread Disabled.
1: Autoread Enabled.
Unused. Read = 0b; Write = Don’t Care.
Short Strobe Enable.
Enables/disables the Short Strobe Feature.
0: Short Strobe disabled.
1: Short Strobe enabled.
Sets the currently selected SmaRTClock register.
See Table 20.1 for a listing of all SmaRTClock indirect registers.
Holds data transferred to/from the internal SmaRTClock register selected by
RTC0ADR.
AUTORD
R/W
6
0
6
0
R
5
0
5
0
SHORT
R/W
Rev. 1.0
RTC0DAT[7:0]
4
0
4
0
R/W
C8051F91x-C8051F90x
Function
Function
3
0
3
0
2
0
2
0
ADDR[3:0]
R/W
1
0
1
0
0
0
0
0
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