C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 194

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

C8051F91x-C8051F90x
20.2. SmaRTClock Clocking Sources
The SmaRTClock peripheral is clocked from its own timebase, independent of the system clock. The
SmaRTClock timebase can be derived from an external CMOS clock, the internal LFO (‘F912 and ‘F902
devices only), or the SmaRTClock oscillator circuit, which has two modes of operation: Crystal Mode, and
Self-Oscillate Mode. The oscillation frequency is 32.768 kHz in Crystal Mode and can be programmed in
the range of 10 kHz to 40 kHz in Self-Oscillate Mode. The internal LFO frequency is 16.4 kHz ±20%. The
frequency of the SmaRTClock oscillator can be measured with respect to another oscillator using an on-
chip timer. See Section “25. Timers” on page 270 for more information on how this can be accomplished.
Note: The SmaRTClock timebase can be selected as the system clock and routed to a port pin. See Section
20.2.1. Using the SmaRTClock Oscillator with a Crystal or External CMOS Clock
When using Crystal Mode, a 32.768 kHz crystal should be connected between XTAL3 and XTAL4. No
other external components are required. The following steps show how to start the SmaRTClock crystal
oscillator in software:
In Crystal Mode, the SmaRTClock oscillator may be driven by an external CMOS clock. The CMOS clock
should be applied to XTAL3. XTAL4 should be left floating. The input low voltage (VIL) and input high
voltage (VIH) for XTAL3 when used with an external CMOS clock are 0.1 and 0.8 V, respectively. The
SmaRTClock oscillator should be configured to its lowest bias setting with AGC disabled. The CLKVLD bit
is indeterminate when using a CMOS clock, however, the OSCFAIL bit may be checked 2 ms after
SmaRTClock oscillator is powered on to ensure that there is a valid clock on XTAL3.
194
“19. Clocking Sources” on page 179 for information on selecting the system clock source and Section “21. Port
Input/Output” on page 205 for information on how to route the system clock to a port pin. On ‘F912 and ‘F902
devices, the SmaRTClock timebase can be routed to a port pin while the device is in its ultra low power sleep
mode. See the PMU0MD register description for details.
1. Set SmaRTClock to Crystal Mode (XMODE = 1).
2. Disable Automatic Gain Control (AGCEN) and enable Bias Doubling (BIASX2) for fast crystal
3. Set the desired loading capacitance (RTC0XCF).
4. Enable power to the SmaRTClock oscillator circuit (RTC0EN = 1).
5. Wait 20 ms.
6. Poll the SmaRTClock Clock Valid Bit (CLKVLD) until the crystal oscillator stabilizes.
7. Poll the SmaRTClock Load Capacitance Ready Bit (LOADRDY) until the load capacitance
8. Enable Automatic Gain Control (AGCEN) and disable Bias Doubling (BIASX2) for maximum
9. Enable the SmaRTClock missing clock detector.
10. Wait 2 ms.
11. Clear the PMU0CF wake-up source flags.
startup.
reaches its programmed value.
power savings.
Rev. 1.0