C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 61

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

5.
The ADC0 on C8051F91x-C8051F90x devices is a 300 ksps, 10-bit or 75 ksps, 12-bit (‘F912/02 only)
successive-approximation-register (SAR) ADC with integrated track-and-hold and programmable window
detector. ADC0 also has an autonomous low power Burst Mode which can automatically enable ADC0,
capture and accumulate samples, then place ADC0 in a low power shutdown mode without CPU
intervention. It also has a 16-bit accumulator that can automatically oversample and average the ADC
results. See Section 5.4 for more details on using the ADC in 12-bit mode.
The ADC is fully configurable under software control via Special Function Registers. The ADC0 operates in
Single-ended mode and may be configured to measure various different signals using the analog
multiplexer described in “5.7. ADC0 Analog Multiplexer” on page 78. The voltage reference for the ADC is
selected as described in “5.9. Voltage and Ground Reference Options” on page 83.
Autonomous Low Power Burst Mode
SAR ADC with 16-bit Auto-Averaging Accumulator and
ADC0PWR
ADC0TK
AMUX0
From
Burst Mode Logic
AIN+
Figure 5.1. ADC0 Functional Block Diagram
ADC0CF
10/12-Bit
ADC
VDD
SAR
ADC0GTH ADC0GTL
ADC0LTH
Rev. 1.0
ADC0CN
C8051F91x-C8051F90x
ADC0LTL
Conversion
Start
100
000
001
010
011
32
16-Bit Accumulator
AD0WINT
Compare
W indow
CNVSTR Input
AD0BUSY (W )
Timer 0 Overflow
Timer 2 Overflow
Timer 3 Overflow
Logic
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