C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 72

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

C8051F91x-C8051F90x
SFR Definition 5.4. ADC0PWR: ADC0 Burst Mode Power-Up Time
SFR Page = 0xF; SFR Address = 0xBA
72
Name
Reset
Bit
Type
6:4
3:0
7
Bit
AD0PWR[3:0] ADC0 Burst Mode Power-Up Time.
AD0LPM
AD0LPM
Unused
Name
R/W
7
0
ADC0 Low Power Mode Enable.
Enables Low Power Mode Operation. Only available on ‘F912 and ‘F902 devices.
0: Low Power Mode disabled.
1: Low Power Mode enabled.
Unused.
Read = 0000b; Write = Don’t Care.
Sets the time delay required for ADC0 to power up from a low power state.
For BURSTEN = 0:
For BURSTEN = 1 and AD0EN = 1:
all conversions are complete.
Conversions can begin immediately following the start-of-conversion signal.
For BURSTEN = 1 and AD0EN = 0:
Conversions can begin a programmed delay after the start-of-conversion signal.
The ADC0 Burst Mode Power-Up time is programmed according to the following
equation:
Note: Setting AD0PWR to 0x04 provides a typical tracking time of 2 us for the first
sample taken after the start of conversion.
R
6
0
or
AD0PWR
Tstartup
R
5
0
=
=
ADC0 power state controlled by AD0EN.
ADC0 remains enabled and does not enter a low power state after
ADC0 enters a low power state after all conversions are complete. 
Tstartup
---------------------- 1

AD0PWR
400ns
Rev. 1.0
R
4
0
–
+
1
400ns
Function
3
1
AD0PWR[3:0]
2
1
R/W
1
1
0
1