C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 122

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

C8051F91x-C8051F90x
122
Interrupt Source
Reset
External Interrupt 0 (INT0)
Timer 0 Overflow
External Interrupt 1 (INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow
SPI0
SMB0
SmaRTClock Alarm
ADC0 Window Comparator 0x004B
ADC0 End of Conversion
Programmable Counter
Array
Comparator0
Comparator1
Timer 3 Overflow
Supply Monitor Early
Warning
Port Match
SmaRTClock Oscillator Fail
SPI1
Notes:
1. Indicates a read-only interrupt pending flag. The interrupt enable may be used to prevent software from
2. Indicates a register located in an indirect memory space.
3.
vectoring to the associated interrupt service routine.
8Blue
text Indicates a bit only available on ‘F912 and ‘F902 devices.
Interrupt
Vector
0x000B
0x001B
0x002B
0x003B
0x005B
0x006B
0x007B
0x008B
0x0000
0x0003
0x0013
0x0023
0x0033
0x0043
0x0053
0x0063
0x0073
0x0083
0x0093
Table 12.1. Interrupt Summary
Priority
Order
Top
10
12
13
14
15
16
17
18
11
0
1
2
3
4
5
6
7
8
9
Pending Flag
None
IE0 (TCON.1)
TF0 (TCON.5)
IE1 (TCON.3)
TF1 (TCON.7)
RI0 (SCON0.0)
TI0 (SCON0.1)
TF2H (TMR2CN.7)
TF2L (TMR2CN.6)
SPIF (SPI0CN.7) 
WCOL (SPI0CN.6)
MODF (SPI0CN.5)
RXOVRN (SPI0CN.4)
SI (SMB0CN.0)
ALRM (RTC0CN.2)
AD0WINT (ADC0CN.3)
AD0INT (ADC0STA.5)
CF (PCA0CN.7)
CCFn (PCA0CN.n)
CP0FIF (CPT0CN.4)
CP0RIF (CPT0CN.5)
CP1FIF (CPT1CN.4)
CP1RIF (CPT1CN.5)
TF3H (TMR3CN.7)
TF3L (TMR3CN.6)
VDDOK (VDM0CN.5)
VBATOK (VDM0CN.4)
None
OSCFAIL (RTC0CN.5)
SPIF (SPI1CN.7) 
WCOL (SPI1CN.6)
MODF (SPI1CN.5)
RXOVRN (SPI1CN.4)
Rev. 1.0
2
1
2
1, 3
N/A N/A
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Enable Flag
ESPI0 (IE.6) PSPI0 (IP.6)
EX0 (IE.0)
ET0 (IE.1)
EX1 (IE.2)
ET1 (IE.3)
ES0 (IE.4)
ET2 (IE.5)
EWADC0
EARTC0
ERTC0F
Enabled
(EIE1.0)
(EIE1.1)
(EIE1.2)
(EIE1.3)
(EIE1.4)
(EIE1.5)
(EIE1.6)
(EIE1.7)
EWARN
(EIE2.0)
(EIE2.1)
(EIE2.2)
(EIE2.3)
ESMB0
EADC0
EPCA0
Always
ESPI1
ECP0
ECP1
EMAT
ET3
Priority
Control
PX0 (IP.0)
PT0 (IP.1)
PX1 (IP.2)
PT1 (IP.3)
PS0 (IP.4)
PT2 (IP.5)
PFRTC0F
PWADC0
PARTC0
(EIP1.0)
(EIP1.1)
(EIP1.2)
(EIP1.3)
(EIP1.4)
(EIP1.5)
(EIP1.6)
(EIP1.7)
PWARN
(EIP2.0)
(EIP2.1)
(EIP2.2)
(EIP2.3)
Highest
PSMB0
PPCA0
Always
PADC0
PSPI1
PCP0
PCP1
PMAT
PT3