C8051F902-GM Silicon Laboratories Inc, C8051F902-GM Datasheet - Page 152

• Manufacturer Part Number: C8051F902-GM
• Description: IC MCU 8BIT 8KB FLASH 24QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F902-GM

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 24-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 15x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Ram Size: 768 B
• Interface Type: UART
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F912DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F90x
• Maximum Speed: 25 MHz
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1848-5

C8051F91x-C8051F90x
15. Cyclic Redundancy Check Unit (CRC0)
C8051F91x-C8051F90x devices include a cyclic redundancy check unit (CRC0) that can perform a CRC
using a 16-bit or 32-bit polynomial. CRC0 accepts a stream of 8-bit data written to the CRC0IN register.
CRC0 posts the 16-bit or 32-bit result to an internal register. The internal result register may be accessed
indirectly using the CRC0PNT bits and CRC0DAT register, as shown in Figure 15.1. CRC0 also has a bit
reverse register for quick data manipulation.
15.1. CRC Algorithm
The C8051F91x-C8051F90x CRC unit generates a CRC result equivalent to the following algorithm:
Repeat Steps 2a/2b for the number of input bits (8). The algorithm is also described in the following
example.
The 16-bit C8051F91x-C8051F90x CRC algorithm can be described by the following code:
unsigned short UpdateCRC (unsigned short CRC_acc, unsigned char CRC_input)
{
152
unsigned char i;
#define POLY 0x1021
// Create the CRC "dividend" for polynomial arithmetic (binary arithmetic
1. XOR the input with the most-significant bits of the current CRC result. If this is the first iteration
2a. If the MSB of the CRC result is set, shift the CRC result and XOR the result with the selected
2b. If the MSB of the CRC result is not set, shift the CRC result.
of the CRC unit, the current CRC result will be the set initial value 
(0x00000000 or 0xFFFFFFFF).
polynomial.
CRC0FLIP
CRC0FLIP
CRC0PNT1
CRC0PNT0
CRC0SEL
CRC0INIT
CRC0VAL
Write
Read
Figure 15.1. CRC0 Block Diagram
CRC0IN
8
// loop counter
CRC Engine
Rev. 1.0
8
8
RESULT
4 to 1 MUX
32
8
8
8
Automatic CRC
8
Controller
CRC0AUTO
CRC0DAT
CRC0CNT
Memory
Flash