AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 441

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

31.6.5
Register Name:
Access Type:
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = Counter is incremented on rising edge of the clock.
1 = Counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• CPCSTOP: Counter Clock Stopped with RC Compare
0 = Counter clock is not stopped when counter reaches RC.
1 = Counter clock is stopped when counter reaches RC.
6257A–ATARM–20-Feb-08
CPCDIS
WAVE
0
0
1
1
31
23
15
7
0
0
0
0
1
1
1
1
BURST
TC Channel Mode Register: Waveform Mode
BSWTRG
ASWTRG
CPCSTOP
0
1
0
1
30
22
14
TC_CMRx [x=0..2] (WAVE = 1)
Read-write
6
TCCLKS
WAVSEL
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
0
0
1
1
0
0
1
1
29
21
13
5
BURST
BEEVT
AEEVT
0
1
0
1
0
1
0
1
ENETRG
28
20
12
4
Clock Selected
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
AT91SAM7L128/64 Preliminary
CLKI
27
19
11
3
BCPC
ACPC
EEVT
26
18
10
2
TCCLKS
25
17
9
1
EEVTEDG
BCPB
ACPA
24
16
8
0
441