AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 161

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Table 20-4.
20.2.4.2
Table 20-5.
6257A–ATARM–20-Feb-08
Step
1
2
3
4
5
6
Step
1
2
3
4
5
6
7
8
Programmer Action
Sets MODE and DATA signals
Clears NCMD signal
Waits for RDY low
Releases MODE and DATA signals
Sets NCMD signal
Waits for RDY high
Programmer Action
Sets MODE and DATA signals
Clears NCMD signal
Waits for RDY low
Sets DATA signal in tristate
Clears NOE signal
Waits for NVALID low
Reads value on DATA Bus
Read Handshaking
Write Handshake
Read Handshake
For details on the read handshaking sequence, refer to
Figure 20-4.
MODE[3:0]
DATA[15:0]
NVALID
NCMD
Parallel Programming Timing, Read Sequence
NOE
RDY
1
Device Action
Waits for NCMD low
Latches MODE and DATA
Clears RDY signal
Executes command and polls NCMD high
Executes command and polls NCMD high
Sets RDY
Device Action
Waits for NCMD low
Latch MODE and DATA
Clears RDY signal
Waits for NOE Low
Sets DATA bus in output mode and outputs
the flash contents.
Clears NVALID signal
Waits for NOE high
2
Adress IN
ADDR
3
AT91SAM7L128/64 Preliminary
4
5
Z
6
Figure 20-4
7
Data OUT
8
9
and
Data I/O
Input
Input
Input
Input
Input
Input
DATA I/O
Input
Input
Input
Input
Tristate
Output
Output
Output
10
11
Table
X
12
20-5.
13
IN
161