AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 173

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21. AT91SAM Boot Program
21.1
21.2
21.3
6257A–ATARM–20-Feb-08
Overview
Flow Diagram
Device Initialization
The Boot Program integrates different programs permitting download and/or upload into the dif-
ferent memories of the product.
SAM-BA
1 is set to 0.
Once running, SAM-BA
quency, then it waits for transactions on the DBGU serial port.
The Boot Program implements the algorithm in
Figure 21-1. Boot Program Algorithm Flow Diagram
Initialization follows the steps described below:
1. FIQ initialization
1. Stack setup for ARM supervisor mode
2. Setup the Embedded Flash Controller
3. PLL setup: PLL is initialized to generate a 30 MHz typical frequency
4. Switch Master Clock on PLL Clock divided by 2 (15 MHz MCK frequency)
5. Copy code into SRAM
6. C variable initialization
7. Disable of the Watchdog and enable of the user reset
8. Jump to SAM-BA Boot sequence (see
®
Boot is executed at power-up only, if the device exits OFF mode and if the GPNVM bit
Device
Setup
™
Boot first initializes the Debug Unit serial port (DBGU) and the PLL fre-
No
AT91SAM7L128/64 Preliminary
Sequence Successful ?
AutoBaudrate
“SAM-BA Boot”
Figure
21-1.
Yes
)
Run SAM-BA Boot
173