AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 215

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

24.5
24.5.1
6257A–ATARM–20-Feb-08
Main Clock
2 MHz Fast RC Oscillator
Figure 24-3
Figure 24-3. Main Clock Block Diagram
The Main Clock has two sources:
After reset, the 2 MHz Fast RC Oscillator is enabled and selected as MAINCK. MAINCK is the
default clock selected to start up the system.
Startup-up time specifications are provided in the “DC Characteristics” section of the product
datasheet.
The software can disable or enable the 2 MHz Fast RC Oscillator with the MAINCKON bit in the
Clock Generator Main Oscillator Register (CKGR_MOR).
When disabling the Main Clock by clearing the MAINCKON bit in CKGR_MOR, the MAINRDY
bit in the Power Management Controller Status Register (PMC_SR) is automatically cleared,
indicating the Main Clock is off.
Setting the MAINRDY bit in the Power Management Controller Interrupt Enable Register
(PMC_IER) can trigger an interrupt to the processor.
It is recommended to disable the Main Clock as soon as the processor no longer uses it and
runs out of SLCK or PLLCK.
Disabling the MAINCKON bit is also used to go into WAIT mode. The user sets the Main Clock
as Master clock and disables the Main Clock by clearing the MAINCKON bit.
To wake up from WAIT mode, a fast startup must be done. See
• 2 MHz Fast RC Oscillator which starts very quickly and is used at startup
• an external clock (CLKIN)
shows the Main Clock block diagram.
CLKIN
Slow Clock
SLCK
Embedded
2 MHz RC
Oscillator
MAINCKON
AT91SAM7L128/64 Preliminary
Main Clock
MAINCKON
Frequency
MCKSEL
Counter
1
0
MAINCKON
Section 25.6 ”The Fast
Main Clock
MAINCK
MAINRDY
MAINSELS
MAINFRDY
MAINF
Startup”.
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