AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 149

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 19-7. Example of Partial Page Programming
19.3.3.3
19.3.3.4
6257A–ATARM–20-Feb-08
X words
X words
X words
X words
Erase Commands
Lock Bit Protection
So Page Y erased
Erase All Flash
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
32-bit wide
Step 1.
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
...
...
...
...
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
By using the WP command, a page can be programmed in several steps if it has been erased
before (see
Erase commands are allowed only on unlocked regions.
The erase sequence is:
Two errors can be detected in the MC_FSR register after a programming sequence:
Lock bits are associated with several pages in the embedded Flash memory plane. This defines
lock regions in the embedded Flash memory plane. They prevent writing/erasing protected
pages.
The lock sequence is:
• a Lock Error: the page to be programmed belongs to a locked region. A command must be
• Erase starts as soon as one of the erase commands and the FARG field are written in the
• When the programming completes, the FRDY bit in the Flash Programming Status Register
• a Command Error: a bad keyword has been written in the MC_FCR register.
• a Lock Error: at least one page to be erased belongs to a locked region. The erase command
• The Set Lock command (SLB) and a page number to be protected are written in the Flash
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
previously run to unlock the corresponding region.
Flash Command Register.
(MC_FSR) rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
has been refused, no page has been erased. A command must be previously run to unlock
the corresponding region.
Command Register.
Figure
Programming of the second part of Page Y
19-7).
FF
FF
FF
CA FE
CA FE
CA FE
FF
FF
FF
FF
FF
FF
32-bit wide
FF
FF
FF
Step 2.
FF
FF
FF
FF
FF
FF
...
...
...
...
AT91SAM7L128/64 Preliminary
FF
FF
FF
CA
CA
CA
FF
FF
FF
FF
FF
FF
FF
FF
FF
FE
FE
FE
FF
FF
FF
FF
FF
FF
Programming of the third part of Page Y
FF
FF
FF
CA FE
CA FE
CA FE
DE CA
DE CA
DE CA
FF
FF
FF
32-bit wide
FF
FF
FF
FF
FF
FF
Step 3.
...
...
...
...
FF
FF
FF
CA
CA
CA
DE CA
DE CA
DE CA
FF
FF
FF
FF
FF
FF
FF
FF
FF
FE
FE
FE
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