AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 146

• Manufacturer Part Number: AT91SAM7L64-AU
• Description: MCU ARM7 64K HS FLASH 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Controller Family/series: AT91SAM7xxx
• No. Of I/o's: 80
• Ram Memory Size: 6KB
• Cpu Speed: 36MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

146
AT91SAM7L128/64 Preliminary
Table 19-1.
In order to perform one of these commands, the Flash Command Register (MC_FCR) has to be
written with the correct command using the field FCMD. As soon as the MC_FCR register is writ-
ten, the FRDY flag and the field FVALUE in the MC_FRR register are automatically
cleared. Once the current command is achieved, then the FRDY flag is automatically set. If an
interrupt has been enabled by setting the bit FRDY in MC_FMR, the interrupt line of the Memory
Controller is activated.
All the commands are protected by the same keyword, which has to be written in the 8 highest
bits of the MC_FCR register.
Writing MC_FCR with data that does not contain the correct key and/or with an invalid command
has no effect on the whole memory plane, but the FCMDE flag is set in the MC_FSR register.
This flag is automatically cleared by a read access to the MC_FSR register.
When the current command writes or erases a page in a locked region, the command has no
effect on the whole memory plane, but the FLOCKE flag is set in the MC_FSR register. This flag
is automatically cleared by a read access to the MC_FSR register.
Command
Set GPNVM Bit
Clear GPNVM Bit
Get GPNVM Bit
Set of Commands (Continued)
Value
0xB
0xC
0xD
Mnemonic
SGPB
CGPB
GGPB
6257A–ATARM–20-Feb-08