UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 74

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
3.4.4 Short direct addressing
74
Effective address
[Function]
[Operand format]
[Description example]
[Illustration]
The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word.
This addressing is applied to the 256-byte space FE20H to FF1FH. Internal RAM and special function registers
(SFRs) are mapped at FE20H to FEFFH and FF00H to FF1FH, respectively.
The SFR area (FF00H to FF1FH) where short direct addressing is applied is a part of the overall SFR area.
Ports that are frequently accessed in a program and compare and capture registers of the timer/event counter
are mapped in this area, allowing SFRs to be manipulated with a small number of bytes and clocks.
When 8-bit immediate data is at 20H to FFH, bit 8 of an effective address is set to 0. When it is at 00H to 1FH,
bit 8 is set to 1. Refer to the [Illustration] shown below.
MOV 0FE30H, A; when transferring value of A register to saddr (FE30H)
When 8-bit immediate data is 20H to FFH,
When 8-bit immediate data is 00H to 1FH,
saddr
saddrp
Identifier
15
7
1
Operation code
1
1
saddr-offset
Immediate data that indicate label or FE20H to FF1FH
Immediate data that indicate label or FE20H to FF1FH (even address only)
OP code
1
1
1
CHAPTER 3 CPU ARCHITECTURE
1
1
0
User’s Manual U17554EJ4V0UD
0
8 7
1
0
α
α
= 0
= 1
1
1
1
1
0
0
Description
0
0
1
0
0
0
OP code
30H (saddr-offset)
0
Short direct memory

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