UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 547

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

Note Do not start operation of these functions on the external clock input from peripheral hardware pins in the stop
(Remark and Cautions are listed on the next page.)
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
CAN controller
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
mode.
STOP Mode Setting
UART60
UART61
CSI10
CSI11
f
f
f
f
f
00
01
02
03
50
51
H0
H1
RH
X
EXCLK
XT
EXCLKS
Note
Note
Note
Note
Note
Note
Note
Note
Clock supply to the CPU is stopped
Stopped
Input invalid
Status before STOP mode was set is retained
Operates or stops by external clock input
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Status before STOP mode was set is retained
Status before STOP mode was set is retained
Operation stopped
Operable only when TI50 is selected as the count clock
Operable only when TI51 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event counter
50 operation
Operable only when f
Operable only when subsystem clock is selected as the count clock
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable only when subsystem clock is selected as the count clock
Operation stopped
Operable only when TM50 output is selected as the serial clock during 8-bit timer/event counter
50 operation
Operable only when external clock is selected as the serial clock
Operable. Can be woken up from sleep mode.
Operation stopped
Operable
When CPU Is Operating on
Table 18-3. Operating Statuses in STOP Mode
Oscillation Clock (f
Internal High-Speed
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 18 STANDBY FUNCTION
User’s Manual U17554EJ4V0UD
RL
RH
, f
RL
)
/2
7
, f
RL
/2
When CPU Is Operating on
9
is selected as the count clock
X1 Clock (f
X
)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)
547