UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 579

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(1) Low-voltage detection register (LVIM)
Address: FFBEH
Symbol
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears LVIM to 00H.
LVIM
Notes 1.
LVION
LVISEL
LVIMD
LVIF
2.
3.
4. The value of LVIF is output as the interrupt request signal INTLVI when LVION = 1 and LVIMD = 0.
LVION
<7>
0
1
0
1
0
1
0
1
Notes 2, 3
Note 4
Bit 0 is read-only.
LVION, LVIMD, and LVISEL are cleared to 0 in the case of a reset other than an LVI reset. These
are not cleared to 0 in the case of an LVI reset.
When LVION is set to 1, operation of the comparator in the LVI circuit is started. Use software to
wait for an operation stabilization time and minimum pulse width (10
set to 1 until the voltage is confirmed at LVIF.
Note 2
Note 2
After reset: 00H
Disables operation
Enables operation
Detects level of supply voltage (V
Detects level of input voltage from external input pin (EXLVI)
• LVISEL = 0: Generates an internal interrupt signal when the supply voltage (V
• LVISEL = 1: Generates an interrupt signal when the input voltage from an external
• LVISEL = 0: Generates an internal reset signal when the supply voltage (V
• LVISEL = 1: Generates an internal reset signal when the input voltage from an
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) ≥ detection voltage (V
• LVISEL = 0: Supply voltage (V
• LVISEL = 1: Input voltage from external input pin (EXLVI) < detection voltage (V
Figure 22-2. Format of Low-Voltage Detection Register (LVIM)
6
0
Low-voltage detection operation mode (interrupt/reset) selection
CHAPTER 22 LOW-VOLTAGE DETECTOR
lower than the detection voltage (V
V
input pin (EXLVI) drops lower than the detection voltage (V
V
detection voltage (V
external input pin (EXLVI) < detection voltage (V
reset signal when EXLVI ≥ V
disabled
or when operation is disabled
R/W
LVI
EXLVI
5
0
or higher (V
Note 1
) or when EXLVI becomes V
User’s Manual U17554EJ4V0UD
Enables low-voltage detection operation
4
0
Voltage detection selection
DD
Low-voltage detection flag
DD
DD
DD
≥ V
) ≥ detection voltage (V
) < detection voltage (V
LVI
)
LVI
) and releases the reset signal when V
).
EXLVI
3
0
.
EXLVI
LVI
) (V
or higher (EXLVI ≥ V
LVISEL
<2>
DD
LVI
< V
LVI
), or when operation is
)
LVI
EXLVI
) or when V
LVIMD
) and releases the
<1>
μ
EXLVI
EXLVI
s (MAX.)) when LVION is
DD
DD
DD
) (EXLVI <
becomes
).
≥ V
) <
DD
LVIF
<0>
LVI
EXLVI
) drops
EXLVI
.
),
)
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