UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 338
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) Communication operation
338
(a) Format and waveform example of normal transmit/receive data
Remark n = 0, 1
Figures 14-20 and 14-21 show the format and waveform example of the normal transmit/receive data.
1. LSB-first transmission/reception
2. MSB-first transmission/reception
One data frame consists of the following bits.
• Start bit ... 1 bit
• Character bits ... 7 or 8 bits
• Parity bit ... Even parity, odd parity, 0 parity, or no parity
• Stop bit ... 1 or 2 bits
The character bit length, parity, and stop bit length in one data frame are specified by asynchronous serial
interface operation mode register 6n (ASIM6n).
Whether data is communicated with the LSB or MSB first is specified by bit 1 (DIR6) of asynchronous serial
interface control register 6n (ASICL6n).
Whether the T
Start
Start
bit
bit
X
D6n pins outputs normal or inverted data is specified by bit 0 (TXDLV6) of ASICL6n.
Figure 14-21. Format of Normal UART Transmit/Receive Data
D0
D7
CHAPTER 14 SERIAL INTERFACES UART60 AND UART61
D1
D6
D2
D5
User’s Manual U17554EJ4V0UD
D3
D4
Character bits
Character bits
1 data frame
1 data frame
D4
D3
D5
D2
D6
D1
D7
D0
Parity
Parity
bit
bit
Stop bit
Stop bit
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