UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 120

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(2) Port registers (P0, P1, P3 to P9, P12, P13)
latch is read.
120
Symbol
These registers can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
These registers write the data that is output from the chip when data is output from a port.
If the data is read in the input mode, the pin level is read. If it is read in the output mode, the value of the output
Remark An undefined value (pin input level) is read for the value after reset when P0 is read in the input mode.
P12
P13
P0
P1
P3
P4
P5
P6
P7
P8
P9
P17
P87
7
0
7
7
0
7
0
7
0
7
0
7
0
7
7
0
7
0
7
0
Pmn
When P8 and P9 are read in the output mode, 00H (output latch value) is output.
0
1
P86
Output 0
Output 1
P06
P16
P76
6
6
6
0
6
0
6
0
6
0
6
6
6
0
6
0
6
0
Output data control (in output mode)
P05
P15
P75
P85
5
5
5
0
5
0
5
0
5
0
5
5
5
0
5
0
5
0
P124
Figure 5-25. Format of Port Register
P14
P74
P84
4
0
4
4
0
4
0
4
0
4
0
4
4
4
0
4
4
0
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17554EJ4V0UD
P123
P13
P33
P43
P53
P63
P73
P83
P93
3
0
3
3
3
3
3
3
3
3
3
3
0
m = 0, 1, 3 to 9, 12, 13; n = 0 to 7
P122
P132
P12
P32
P42
P52
P62
P72
P82
P92
2
0
2
2
2
2
2
2
2
2
2
2
P121
P131
P01
P11
P31
P41
P51
P61
P71
P81
P91
1
1
1
1
1
1
1
1
1
1
1
Input low level
Input high level
P120
P130
P00
P10
P30
P40
P50
P60
P70
P80
P90
0
0
0
0
0
0
0
0
0
0
0
Input data read (in input mode)
Address
FF0CH
FF0DH
FF00H
FF01H
FF03H
FF04H
FF05H
FF06H
FF07H
FF08H
FF09H
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
00H (output latch)
After reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W