UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 277

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

11.4.2 Setting overflow time of watchdog timer
period before the overflow time, the present count is cleared and the watchdog timer starts counting again.
Set the overflow time of the watchdog timer by using bits 3 to 1 (WDCS2 to WDCS0) of the option byte.
If an overflow occurs, an internal reset signal is generated. If “ACH” is written to WDTE during the window open
The following overflow time is set.
Cautions 1. The combination of WDCS2 = WDCS1 = WDCS0 = 0 and WINDOW1 =
Remarks 1. f
WDCS2
0
0
0
0
1
1
1
1
2. The watchdog timer continues its operation during self-programming and
2. ( ): f
WINDOW0 = 0 is prohibited.
EEPROM emulation of the flash memory.
interrupt acknowledge time is delayed. Set the overflow time and window
size taking this delay into consideration.
RL
Table 11-3. Setting of Overflow Time of Watchdog Timer
WDCS1
: Internal low-speed oscillation clock frequency
0
0
1
1
0
0
1
1
RL
= 264 kHz (MAX.)
CHAPTER 11 WATCHDOG TIMER
WDCS0
0
1
0
1
0
1
0
1
User’s Manual U17554EJ4V0UD
2
2
2
2
2
2
2
2
10
11
12
13
14
15
16
17
/f
/f
/f
/f
/f
/f
/f
/f
RL
RL
RL
RL
RL
RL
RL
RL
(3.88 ms)
(7.76 ms)
(15.52 ms)
(31.03 ms)
(62.06 ms)
(124.12 ms)
(248.24 ms)
(496.48 ms)
Overflow Time of Watchdog Timer
During processing, the
277