UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 276
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Cautions 4. The operation of the watchdog timer in the HALT and STOP modes differs as follows
5. The watchdog timer continues its operation during self-programming and EEPROM
In HALT mode
In STOP mode
depending on the set value of bit 0 (LSROSC) of the option byte.
If LSROSC = 0, the watchdog timer resumes counting after the HALT or STOP mode is
released. At this time, the counter is not cleared to 0 but starts counting from the value at
which it was stopped.
If oscillation of the internal low-speed oscillator is stopped by setting LSRSTOP (bit 1 of the
internal oscillator mode register (RCM) = 1) when LSROSC = 0, the watchdog timer stops
operating. At this time, the counter is not cleared to 0.
emulation of the flash memory.
delayed. Set the overflow time and window size taking this delay into consideration.
CHAPTER 11 WATCHDOG TIMER
Watchdog timer operation stops.
Oscillator Can Be Stopped by Software)
LSROSC = 0 (Internal Low-Speed
User’s Manual U17554EJ4V0UD
During processing, the interrupt acknowledge time is
Watchdog timer operation continues.
LSROSC = 1 (Internal Low-Speed
Oscillator Cannot Be Stopped)
TM
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