UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 12
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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CHAPTER 15 SERIAL INTERFACES CSI10 AND CSI11 ................................................................ 357
CHAPTER 16 CAN CONTROLLER ..................................................................................................... 378
12
14.2 Configurations of Serial Interface UART60 and UART61..................................................... 312
14.3 Registers Controlling Serial Interfaces UART60 and UART61 ............................................ 316
14.4 Operations of Serial Interface UART60 and UART61............................................................ 335
15.1 Functions of Serial Interfaces CSI10 and CSI11 ................................................................... 357
15.2 Configuration of Serial Interfaces CSI10 and CSI11 ............................................................. 358
15.3 Registers Controlling Serial Interfaces CSI10 and CSI11 .................................................... 360
15.4 Operation of Serial Interfaces CSI10 and CSI11.................................................................... 365
16.1 Outline Description .................................................................................................................. 378
16.2 CAN Protocol ............................................................................................................................ 381
16.3 Functions .................................................................................................................................. 392
16.4 Connection with Target System.............................................................................................. 403
16.5 Internal Registers of CAN Controller...................................................................................... 404
16.6 Bit Set/Clear Function.............................................................................................................. 418
16.7 Control Registers ..................................................................................................................... 420
16.8 CAN Controller Initialization.................................................................................................... 455
16.9 Message Reception .................................................................................................................. 458
14.4.1 Operation stop mode......................................................................................................................335
14.4.2 Asynchronous serial interface (UART) mode .................................................................................336
14.4.3 Dedicated baud rate generator.......................................................................................................351
15.4.1 Operation stop mode......................................................................................................................365
15.4.2 3-wire serial I/O mode ....................................................................................................................366
16.1.1 Features .........................................................................................................................................378
16.1.2 Overview of functions .....................................................................................................................379
16.1.3 Configuration ..................................................................................................................................380
16.2.1 Frame format..................................................................................................................................381
16.2.2 Frame types ...................................................................................................................................382
16.2.3 Data frame and remote frame ........................................................................................................382
16.2.4 Error frame .....................................................................................................................................390
16.2.5 Overload frame...............................................................................................................................391
16.3.1 Determining bus priority .................................................................................................................392
16.3.2 Bit stuffing ......................................................................................................................................392
16.3.3 Multi masters ..................................................................................................................................392
16.3.4 Multi cast ........................................................................................................................................392
16.3.5 CAN sleep mode/CAN stop mode function ....................................................................................392
16.3.6 Error control function ......................................................................................................................393
16.3.7 Baud rate control function ..............................................................................................................399
16.5.1 CAN controller configuration...........................................................................................................404
16.5.2 Register access type ......................................................................................................................405
16.5.3 Register bit configuration................................................................................................................414
16.8.1 Initialization of CAN module ...........................................................................................................455
16.8.2 Initialization of message buffer .......................................................................................................455
16.8.3 Redefinition of message buffer.......................................................................................................455
16.8.4 Transition from initialization mode to operation mode ....................................................................456
16.8.5 Resetting error counter C0ERC of CAN module ............................................................................457
User’s Manual U17554EJ4V0UD
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