UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 475

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

16.11.2 CAN stop mode
CAN module can enter the CAN stop mode only from the CAN sleep mode. Release of the CAN stop mode puts the
CAN module in the CAN sleep mode.
the C0CTRL register and not by a change in the CAN bus state. No message is transmitted even when transmission
requests are issued or pending.
The CAN stop mode can be used to set the CAN controller to standby mode to reduce power consumption. The
The CAN stop mode can only be released (entering CAN sleep mode) by writing 01B to the PSMODE [1:0] bits of
(1) Entering CAN stop mode
(2) Status in CAN stop mode
(3) Releasing CAN stop mode
A CAN stop mode transition request is issued by writing 11B to the PSMODE [1:0] bits of the C0CTRL
register.
A CAN stop mode request is only acknowledged when the CAN module is in the CAN sleep mode. In all
other modes, the request is ignored.
The CAN module is in one of the following states after it enters the CAN stop mode.
- The internal operating clock is stopped and the power consumption is minimized.
- To wake up the CAN module from the CPU, data can be written to PSMODE [1:0] of the CAN module
- The CAN module registers can be read, except for C0LIPT, C0RGPT, C0LOPT, and C0TGPT.
- The CAN message buffer registers cannot be written or read.
- MBON bit of the CAN Global Control register (C0GMCTRL) is cleared.
- An initialization mode transition request is not acknowledged and is ignored.
The CAN stop mode can only be released by writing 01B to the PSMODE [1:0] bits of the C0CTRL register.
After releasing the CAN stop mode, the CAN module enters the CAN sleep mode.
When the initialization mode is requested while the CAN module is in the CAN stop mode, that request is
ignored; the CPU has to release the stop mode and subsequently CAN sleep mode before entering the
initialization mode. It is impossible to enter the other operation mode directly from the CAN stop mode not
entering the CAN sleep mode, that request is ignored.
control register (C0CTRL), but nothing can be written to other CAN module registers or bits.
Caution
Remark
To set the CAN module to the CAN stop mode, the module must be in the CAN sleep
mode. To confirm that the module is in the sleep mode, check that PSMODE [1:0] = 01B,
and then request the CAN stop mode. If a bus change occurs at the CAN reception pin
(CRxD) while this process is being performed, the CAN sleep mode is automatically
released. In this case, the CAN stop mode transition request cannot be acknowledged.
m = 0 to 15
CHAPTER 16 CAN CONTROLLER
User’s Manual U17554EJ4V0UD
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