UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 546
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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18.2.2 STOP mode
(1) STOP mode setting and operating statuses
546
The STOP mode is set by executing the STOP instruction, and it can be set only when the CPU clock before the
setting was the main system clock.
The operating statuses in the STOP mode are shown below.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an
×: don’t care
interrupt source with the interrupt request flag set and the interrupt mask flag reset, the
standby mode is immediately cleared if set. Thus, the STOP mode is reset to the HALT mode
immediately after execution of the STOP instruction and the system returns to the operating
mode as soon as the wait time set using the oscillation stabilization time select register
(OSTS) has elapsed.
Maskable interrupt
request
Reset signal input
Table 18-2. Operation in Response to Interrupt Request in HALT Mode
Release Source
CHAPTER 18 STANDBY FUNCTION
MK××
User’s Manual U17554EJ4V0UD
0
0
0
0
0
1
−
PR××
0
0
1
1
1
×
−
IE
0
1
0
×
1
×
×
ISP
×
×
1
0
1
×
×
Next address
instruction execution
Interrupt servicing
execution
Next address
instruction execution
Interrupt servicing
execution
HALT mode held
Reset processing
Operation
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