ST92F150CV1QB STMicroelectronics, ST92F150CV1QB Datasheet - Page 348

• Manufacturer Part Number: ST92F150CV1QB
• Description: MCU 8BIT 128K FLASH 100PQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F150CV1QB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-QFP
• Processor Series: ST92F15x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4882

CONTROLLER AREA NETWORK (bxCAN)
CONTROLLER AREA NETWORK (Cont’d)
TRANSMIT ERROR COUNTER REG. (TECR)
Read Only
Reset Value: 00h
TEC[7:0] is the least significant byte of the 9-bit
Transmit Error Counter implementing part of the
fault confinement mechanism of the CAN protocol.
RECEIVE ERROR COUNTER REG. (RECR)
Page: 00h — Read Only
Reset Value: 00h
REC[7:0] is the Receive Error Counter implement-
ing part of the fault confinement mechanism of the
CAN protocol. In case of an error during reception,
this counter is incremented by 1 or by 8 depending
on the error condition as defined by the CAN stand-
ard. After every successful reception the counter is
decremented by 1 or reset to 120 if its value was
higher than 128. When the counter value exceeds
127, the CAN controller enters the error passive
state.
348/429
9
REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
TEC7
7
7
TEC6
TEC5
TEC4
TEC3
TEC2
TEC1
TEC0
0
0
CAN DIAGNOSIS REGISTER (CDGR)
All bits of this register are set and clear by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Bit 3 = RX CAN Rx Signal
- Read
Monitors the actual value of the CAN_RX Pin.
Bit 2 = SAMP Last Sample Point
- Read
The value of the last sample point.
Bit 1 = SILM Silent Mode
- Read/Set/Clear
0: Normal operation
1: Silent Mode
Bit 0 = LBKM Loop Back Mode
- Read/Set/Clear
0: Loop Back Mode disabled
1: Loop Back Mode enabled
7
0
0
0
0
RX
SAMP
SILM
LBKM
0