ST92F150CV1QB STMicroelectronics, ST92F150CV1QB Datasheet - Page 154

• Manufacturer Part Number: ST92F150CV1QB
• Description: MCU 8BIT 128K FLASH 100PQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F150CV1QB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-QFP
• Processor Series: ST92F15x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4882

ST92F124/F150/F250 - I/O PORTS
INPUT/OUTPUT BIT CONFIGURATION (Cont’d)
Figure 81. Basic Structure of an I/O Port Pin
Figure 82. Input Configuration
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OUTPUT MASTER LATCH
TRISTATE
OUTPUT SLAVE LATCH
PERIPHERAL
OUTPUT
FROM
INTERNAL DATA BUS
WEAK PULL-UP
I/O PIN
OPEN DRAIN
PUSH-PULL
TRISTATE
BIDIRECTIONAL
ALTERNATE
FUNCTION
OUTPUT MASTER LATCH
INPUT LATCH
OUTPUT
OUTPUT SLAVE LATCH
INPUT
(or Schmitt Trigger)
TO PERIPHERAL
TTL / CMOS
INTERRUPTS
INPUTS AND
INTERNAL DATA BUS
OUTPUT
I/O PIN
Figure 83. Output Configuration
n
OPEN DRAIN
PUSH-PULL
OUTPUT MASTER LATCH
OUTPUT SLAVE LATCH
INPUT LATCH
INTERNAL DATA BUS
I/O PIN
BIDIRECTIONAL
ALTERNATE
FUNCTION
TO PERIPHERAL
INTERRUPTS
INPUT
INPUTS AND
(or Schmitt Trigger)
INPUT LATCH
TTL / CMOS
(or Schmitt Trigger)
TO PERIPHERAL
INTERRUPTS
INPUTS AND
TTL