DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 574

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.3
The A/D converter has the following registers.
• A/D data register A (ADDRA)
• A/D data register B (ADDRB)
• A/D data register C (ADDRC)
• A/D data register D (ADDRD)
• A/D data register E (ADDRE)
• A/D data register F (ADDRF)
• A/D data register G (ADDRG)
• A/D data register H (ADDRH)
• A/D control/status register (ADCSR)
• A/D control register (ADCR)
18.3.1
There are eight 16-bit read-only ADDR registers, ADDRA to ADDRH, used to store the results of
A/D conversion. ADDR, which store a conversion result for each channel, are shown in table 18.2.
The converted 10-bit data is stored in bits 15 to 6. The lower 6-bit data is always read as 0.
The data bus between the CPU and the A/D converter is 16-bit width. ADDR can be read directly
from the CPU.
Table 18.2 Analog Input Channels and Corresponding ADDR
Rev.2.00 May. 28, 2009 Page 534 of 732
REJ09B0059-0200
Channel Set 0 (CH3 = 0)
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Register Descriptions
A/D Data Registers A to H (ADDRA to ADDRH)
Analog Input Channel
Channel Set 1 (CH3 = 1)
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
A/D Data Register which Stores
Conversion Result
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH