DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 433

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.3.4
SEDGR detects a rising edge on the timer connection input pins and the occurrence of 2fH
modification, and determines the phase of the IVI and IHI signals.
Bit
7
6
5
4
Bit Name
VEDG
HEDG
CEDG
HFEDG
Edge Sense Register (SEDGR)
Initial Value
0
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
R/(W)*
1
1
1
1
Description
VSYNCI Edge
Detects a rising edge on the VSYNCI pin.
0: [Clearing condition]
When 0 is written to VEDG after reading VEDG = 1
1: [Setting condition]
When a rising edge is detected on the VSYNCI pin
HSYNCI Edge
Detects a rising edge on the HSYNCI pin.
0: [Clearing condition]
When 0 is written to HEDG after reading HEDG = 1
1: [Setting condition]
When a rising edge is detected on the HSYNCI pin
CSYNCI Edge
Detects a rising edge on the CSYNCI pin.
0: [Clearing condition]
When 0 is written to CEDG after reading CEDG = 1
1: [Setting condition]
When a rising edge is detected on the CSYNCI pin
HFBACKI Edge
Detects a rising edge on the HFBACKI pin in
channel 0.
This bit is reserved in channel 1. This bit is always
read as 0 and cannot be modified.
0: [Clearing condition]
When 0 is written to HFEDG after reading HFEDG =
1
1: [Setting condition]
When a rising edge is detected on the HFBACKI pin
Rev.2.00 May. 28, 2009 Page 393 of 732
REJ09B0059-0200