DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 429
DF2437FV
Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of DF2437FV
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 429 of 776
- Download datasheet (5Mb)
Bit
3
2
1
0
Bit Name
HOINV
VOINV
CLOINV
CBOINV
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Horizontal Synchronization Signal Output Inversion
Selects the signal output from the HSYNCO with the
settings of the HS2, HS1, and HS0 bits in TECR.
See table 13.3.
Vertical Synchronization Signal Output Inversion
Selects the signal output from the VSYNCO with the
setting of the VS0 bit in TECR. See table 13.4.
Output Synchronization Signal Inversion
Selects inversion of the output phase of the clamp
waveform (CLAMPO) and blanking waveform
(CBLANK) in channel 0.
These bits are reserved in channel 1. The initial
value should not be changed.
•
0: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
1: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
•
0: The CBLANK signal is used directly as the
1: The CBLANK signal is inverted before use as the
CBLANK output
used directly as the CLAMPO output
inverted before use as the CLAMPO output
CBLANK output
CLOINV
CBOINV
Rev.2.00 May. 28, 2009 Page 389 of 732
REJ09B0059-0200
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