DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 268

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.3.3
PWDPR selects the PWM output phase.
8.3.4
PWOER switches between PWM output and port output.
[Legend]
n = 7 to 0
x: Don't care
To perform PWM 256/256 output when DDR = 1 and OE = 0, the corresponding pin should be set
to port output. The corresponding pin can be set as port output when IOSE = 1 and CS256E = 0 in
SYSCR in single-chip mode or in extended mode with on-chip ROM enabled. Otherwise, it
should be noted that an address bus is output to the corresponding pin.
DR data is output when the corresponding pin is used as port output. A value corresponding to
PWM 256/256 output is determined by the OS bit, so the value should be set to DR beforehand.
Rev.2.00 May. 28, 2009 Page 228 of 732
REJ09B0059-0200
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
OS7
OS6
OS5
OS4
OS3
OS2
OS1
OS0
Bit Name
OE7
OE6
OE5
OE4
OE3
OE2
OE1
OE0
PWM Data Polarity Register (PWDPR)
PWM Output Enable Register (PWOER)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Output Select 7 to 0
These bits select the PWM output phase. Bits OS7 to
OS0 correspond to outputs PW7 to PW0.
0: PWM direct output (PWDR value corresponds to high
width of output)
1: PWM inverted output (PWDR value corresponds to
low width of output)
Description
Output Enable 7 to 0
These bits, together with P1DDR, specify the P1n/PWn
pin state. Bits OE7 to OE0 correspond to outputs PW7
to PW0.
P1nDDR OEn: Pin state
0x: Port input
10: Port output or PWM 256/256 output
11: PWM output (0 to 255/256 output)

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