DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 315

• Manufacturer Part Number: DF2437FV
• Description: IC H8S/2437 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of DF2437FV

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has an on-chip 2-system 8-bit timer module (TMR0 and TMR1) with two channels
operating on the basis of an 8-bit counter. In addition to external event counting, the 8-bit timer
module can be used as a multifunction timer in a variety of applications, such as generation of
counter reset, interrupt requests, and pulse output with an arbitrary duty cycle using a compare-
match signal with two registers.
This LSI also has a similar on-chip 2-system 8-bit timer module (TMRY and TMRX) with two
channels.
11.1
• Selection of clock sources
• Selection of three ways to clear the counters
• Timer output controlled by two compare-match signals
• Cascading of two systems
TIMH261A_000020020300
TMR0, TMR1: The counter input clock can be selected from six internal clocks and an
external clock
TMRY, TMRX: The counter input clock can be selected from three internal clocks and an
external clock
The counters can be cleared on compare-match A or compare-match B, or by an external reset
signal.
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of pulse
output or PWM output with an arbitrary duty cycle.
Cascading of TMR0 and TMR1:
Operation as a 16-bit timer can be performed using the TMR0 as the upper half and TMR1 as
the lower half (16-bit count mode).
The TMR1 can be used to count TMR0 compare-match occurrences (compare-match count
mode).
Cascading of TMRY and TMRX:
Operation as a 16-bit timer can be performed using the TMRY as the upper half and TMRX as
the lower half (16-bit count mode).
The TMRX can be used to count TMRY compare-match occurrences (compare-match count
mode).
Features
Section 11 8-Bit Timer (TMR)
Rev.2.00 May. 28, 2009 Page 275 of 732
REJ09B0059-0200