DF2437FV Renesas Electronics America, DF2437FV Datasheet - Page 550

IC H8S/2437 MCU FLASH 128QFP

DF2437FV

Manufacturer Part Number
DF2437FV
Description
IC H8S/2437 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of DF2437FV

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2437FV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 I
17.3.7
SARA sets slave addresses. When the chip is in slave mode, if the upper 7 bits in SARA match the
upper 7 bits of the first frame received after a start condition, the chip operates as the slave device.
17.3.8
SARB sets slave addresses. When the chip is in slave mode, if the upper 7 bits in SARB match the
upper 7 bits of the first frame received after a start condition, the chip operates as the slave device.
Rev.2.00 May. 28, 2009 Page 510 of 732
REJ09B0059-0200
Bit
7 to 1 SVA6 to
0
Bit
7 to 1 SVA6 to
0
Bit Name Initial Value R/W
SVA0
SARE
Bit Name Initial Value R/W Description
SVA0
SARE
Slave Address Register A (SARA)
Slave Address Register B (SARB)
2
C Bus Interface 3 (IIC3)
All 0
0
All 0
0
R/W
R/W
R/W Slave Address 6 to 0
R/W Slave Address Enable
Description
Slave Address 6 to 0
Set a unique address in bits SVA6 to SVA0, differing from
the addresses of other slave devices connected to the I
bus.
Slave Address Enable
Selects whether slave addresses in SARA are recognized
or not.
0: Ignores slave addresses in SARA
1: Recognizes slave addresses in SARA
Set a unique address in bits SVA6 to SVA0, differing from
the addresses of other slave devices connected to the I
bus.
Selects whether slave addresses in SARB are recognized
or not.
0: Ignores slave addresses in SARB
1: Recognizes slave addresses in SARB
2
2
C
C

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