S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 753

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Figure 20-26
after the reset is low but is not preceded by three high samples that would qualify as a falling edge.
Depending on the timing of the start bit search and on the data, the frame may be missed entirely or it may
set the framing error flag.
In
noise flag but does not reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
20.4.6.4
If the data recovery logic does not detect a logic 1 where the stop bit should be in an incoming frame, it
sets the framing error flag, FE, in SCI status register 1 (SCISR1). A break character also sets the FE flag
because a break character has no stop bit. The FE flag is set at the same time that the RDRF flag is set.
Freescale Semiconductor
Figure
RT Clock Count
RT Clock Count
Reset RT Clock
Reset RT Clock
RT Clock
RT Clock
Samples
Samples
20-27, a noise burst makes the majority of data samples RT8, RT9, and RT10 high. This sets the
RXD
RXD
shows a burst of noise near the beginning of the start bit that resets the RT clock. The sample
Framing Errors
1
1
1
1
1
1
1
1
1
1
MC9S12XE-Family Reference Manual Rev. 1.24
Figure 20-26. Start Bit Search Example 5
Figure 20-27. Start Bit Search Example 6
1
1
1
1
1
1
1
1
0
0
0
0
0
1
Chapter 20 Serial Communication Interface (S12SCIV5)
Start Bit
0
Start Bit
1
1
0
0
0
No Start Bit Found
1
0
0
0
0
0
0
LSB
LSB
753

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