S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 283

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

7.3.2.1
Register Global Address 0x7FFF01
1. ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but
2. CLKSW is read as 1 by a debugging environment in emulation modes when the device is not secured and read as 0 when
3. UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,
Freescale Semiconductor
Special Single-Chip Mode
0x7FFF0A
0x7FFF0B
0x7FFF07
0x7FFF08
0x7FFF09
Address
fully erased (non-volatile memory). This is because the ENBDM bit is set by the standard firmware before a BDM command
can be fully transmitted and executed.
secured if emulation modes available.
else it is 0 and can only be read if not secure (see also bit description).
Global
Emulation Modes
All Other Modes
(if modes available)
BDMCCRH R
BDMGPR
Reserved
Reserved
Reserved
Register
BDM Status Register (BDMSTS)
Name
Reset
W
R
W
W
W
W
W
R
R
R
R
ENBDM
0
BGAE
1
0
0
7
(1)
Bit 7
Figure 7-2. BDM Register Summary (continued)
X
0
0
0
0
Figure 7-3. BDM Status Register (BDMSTS)
MC9S12XE-Family Reference Manual Rev. 1.24
= Unimplemented, Reserved
= Always read zero
BDMACT
= Unimplemented, Reserved
= Indeterminate
BGP6
1
0
0
6
6
0
0
0
0
BGP5
0
0
0
0
5
5
0
0
0
0
SDV
BGP4
0
0
0
4
4
0
0
0
0
Chapter 7 Background Debug Module (S12XBDMV2)
TRACE
BGP3
0
0
0
3
3
0
0
0
0
0
= Implemented (do not alter)
= Implemented (do not alter)
= Always read zero
CLKSW
CCR10
BGP2
1
0
0
2
(2)
2
0
0
0
UNSEC
CCR9
BGP1
0
0
0
1
(3)
1
0
0
0
CCR8
BGP0
Bit 0
0
0
0
0
0
0
0
0
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