S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 245

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
5.3
This section provides a detailed description of all registers accessible in the XEBI.
5.3.1
The registers associated with the XEBI block are shown in
5.3.2
The following sub-sections provide a detailed description of each register and the individual register bits.
All control bits can be written anytime, but this may have no effect on the related function in certain
operating modes. This allows specific configurations to be set up before changing into the target operating
mode.
5.3.2.1
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes, the data is read from this register.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
Freescale Semiconductor
Module Base +0x000E (PRR)
Register
EBICTL0
EBICTL1
Reset
Name
0x0E
0x0F
W
R
Memory Map and Register Definition
ITHRS
Module Memory Map
Register Descriptions
External Bus Interface Control Register 0 (EBICTL0)
0
7
W
W
R
R
Depending on the operating mode an available function may be enabled,
disabled or depend on the control register bit. Reading the register bits will
reflect the status of related function only if the current operating mode
allows user control. Please refer the individual bit descriptions.
ITHRS
Bit 7
= Unimplemented or Reserved
Figure 5-3. External Bus Interface Control Register 0 (EBICTL0)
0
0
0
6
= Unimplemented or Reserved
EXSTR12
MC9S12XE-Family Reference Manual Rev. 1.24
6
0
Figure 5-2. XEBI Register Summary
HDBE
1
5
EXSTR11
HDBE
5
ASIZ4
NOTE
1
4
EXSTR10
ASIZ4
4
Figure
ASIZ3
1
3
ASIZ3
3
0
5-2.
Chapter 5 External Bus Interface (S12XEBIV4)
ASIZ2
EXSTR02
1
2
ASIZ2
2
EXSTR01
ASIZ1
ASIZ1
1
1
1
EXSTR00
ASIZ0
ASIZ0
Bit 0
1
0
245

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