S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 454

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Chapter 10 XGATE (S12XGATEV3)
SUBH
Operation
RD – IMM8:$00 ⇒ RD
Subtracts a signed immediate 8 bit constant from the content of high byte of register RD and using binary
subtraction and stores the result in the high byte of destination register RD. This instruction can be used
after an SUBL for a 16 bit immediate subtraction.
Example:
CCR Effects
Code and CPU Cycles
454
N:
Z:
V:
C:
SUBH RD, #IMM8
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
SUBL
SUBH
old
old
V
Source Form
& IMM8[7] & RD[15]
& IMM8[7] | RD[15]
C
R2,#LOWBYTE
R2,#HIGHBYTE
old
new
& RD[15]
MC9S12XE-Family Reference Manual Rev. 1.24
Subtract Immediate 8 bit Constant
| RD[15]
Address
Mode
IMM8
new
; R2 = R2 - 16 bit immediate
old
& IMM8[7] & RD[15]
| IMM8[7] & RD[15]
(High Byte)
1
1
0
0
new
1
new
Machine Code
RD
IMM8
SUBH
Freescale Semiconductor
Cycles
P

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