S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 422

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Chapter 10 XGATE (S12XGATEV3)
CMP
Operation
RS1 – RS2
RD – IMM16 ⇒ NONE (translates to CMPL RD, #IMM16[7:0]; CPCH RD, #IMM16[15:8])
Subtracts two 16 bit values and discards the result.
CCR Effects
Code and CPU Cycles
422
N:
Z:
V:
C:
CMP RS1, RS2
CMP RS, #IMM16
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS1[15] & RS2[15] & result[15] | RS1[15] & RS2[15] & result[15]
RD[15] & IMM16[15] & result[15] | RD[15] & IMM16[15] & result[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RS1[15] & RS2[15] | RS1[15] & result[15] | RS2[15] & result[15]
RD[15] & IMM16[15] | RD[15] & result[15] | IMM16[15] & result[15]
Z
V
Source Form
⇒ NONE (translates to SUB R0, RS1, RS2)
C
MC9S12XE-Family Reference Manual Rev. 1.24
Address
Mode
IMM8
IMM8
TRI
0
1
1
Compare
0
1
1
0
0
0
1
1
1
1
0
1
0
Machine Code
RS
RS
0
0
RS1
IMM16[15:8]
IMM16[7:0]
RS2
Freescale Semiconductor
CMP
0
0
Cycles
P
P
P

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