S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 172

Manufacturer Part Number

S912XEQ384J3MALR

S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112

Manufacturer

Freescale Semiconductor

1. Read: Anytime.

Chapter 2 Port Integration Module (S12XEPIMV1)

Address 0x0375

Address 0x0376

Write: Anytime.

Port L pull device select—Determine pull device polarity on input pins

This register selects whether a pull-down or a pull-up device is connected to the pin.

1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.

0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.

Port L wired-or mode—Enable wired-or functionality

This register conﬁgures the output pins as wired-or independent of the function used on the pins. If enabled the

output is driven active low only (open-drain). A logic level of “1” is not driven.This allows a multipoint connection of

several serial modules. These bits have no inﬂuence on pins used as inputs.

1 Output buffers operate as open-drain outputs.

0 Output buffers operate as push-pull outputs.

Port L Polarity Select Register (PPSL)

Port L Wired-Or Mode Register (WOML)

Figure 2-97. Port L Wired-Or Mode Register (WOML)

Figure 2-96. Port L Polarity Select Register (PPSL)

Table 2-94. WOML Register Field Descriptions

Table 2-93. PPSL Register Field Descriptions

MC9S12XE-Family Reference Manual Rev. 1.24

Access: User read/write

Freescale Semiconductor