S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 356

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Chapter 10 XGATE (S12XGATEV3)
10.2
The XGATE module has no external pins.
10.3
This section provides a detailed description of address space and registers used by the XGATE module.
The memory map for the XGATE module is given below in
is the sum of a base address and an address offset. The base address is defined at the SoC level and the
address offset is defined at the module level. Reserved registers read zero. Write accesses to the reserved
registers have no effect.
10.3.1
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bits and field functions follow the register
diagrams, in bit order.
356
XGISPSEL
Reserved
XGMCTL
XGCHPL
XGISP74
XGISP31
Register
XGCHID
XGVBR
0x0000
0x0002
0x0003
0x0004
0x0005
0x0006
0x0006
0x0006
Name
External Signal Description
Memory Map and Register Definition
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
Register Descriptions
XGEM
15
0
= Unimplemented or Reserved
FRZM
14
XG
0
DBGM
13
XG
0
Figure 10-2. XGATE Register Summary (Sheet 1 of 3)
XGSSM
12
MC9S12XE-Family Reference Manual Rev. 1.24
0
FACTM
XG
11
0
10
0
SWEFM
XG
9
0
XGISP74[15:1]
XGISP31[15:1]
XGVBR[15:1]
XGIEM
8
0
Figure
XGE XGFRZ XGDBG XGSS
7
0
0
0
10-2.The address listed for each register
6
0
0
5
0
0
4
0
0
XGCHID[6:0]
FACT
XG
Freescale Semiconductor
3
0
0
2
0
0
XGCHPL[2:0]
XGISPSEL[1:0]
SWEF
XG
1
XGIE
0
0
0
0

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