S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 376

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

Chapter 10 XGATE (S12XGATEV3)
10.4.4
The XGATE module offers a set of eight hardware semaphores. These semaphores provide a mechanism
to protect system resources that are shared between two concurrent threads of program execution; one
thread running on the S12X_CPU and one running on the XGATE RISC core.
Each semaphore can only be in one of the three states: “Unlocked”, “Locked by S12X_CPU”, and “Locked
by XGATE”. The S12X_CPU can check and change a semaphore’s state through the XGATE semaphore
register (XGSEM, see
this through its SSEM and CSEM instructions.
IFigure 10-24
376
XGVBR
+$0000
+$0024
+$0028
+$002C
+$0030
+$01E0
Semaphores
illustrates the valid state transitions.
Channel $09 Initial Program Counter
Channel $09 Initial Data Pointer
Channel $0A Initial Program Counter
Channel $0A Initial Data Pointer
Channel $0B Initial Program Counter
Channel $0B Initial Data Pointer
Channel $0C Initial Program Counter
Channel $0C Initial Data Pointer
Channel $78 Initial Program Counter
Channel $78 Initial Data Pointer
Section 10.3.1.10, “XGATE Semaphore Register
MC9S12XE-Family Reference Manual Rev. 1.24
unused
Figure 10-23. XGATE Vector Block
(XGSEM)”). The RISC core does
Code
Data
Code
Data
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