S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 485

no-image

S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Write: Only in special modes
11.3.2.12 S12XECRG COP Timer Arm/Reset Register (ARMCOP)
This register is used to restart the COP time-out period.
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”) writing to this register has no effect.
When the COP is enabled by setting CR[2:0] nonzero, the following applies:
Freescale Semiconductor
Module Base + 0x000B
Reset
W
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP time-out period
you must write $55 followed by a write of $AA. Other instructions may be executed between these
writes but the sequence ($55, $AA) must be completed prior to COP end of time-out period to
avoid a COP reset. Sequences of $55 writes or sequences of $AA writes are allowed. When the
WCOP bit is set, $55 and $AA writes must be done in the last 25% of the selected time-out period;
writing any value in the first 75% of the selected period will cause a COP reset.
Bit 7
0
0
7
Bit 6
0
0
6
Figure 11-14. S12XECRG ARMCOP Register Diagram
MC9S12XE-Family Reference Manual Rev. 1.24
Bit 5
0
0
5
Bit 4
0
0
4
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
Bit 3
0
0
3
Bit 2
0
0
2
Bit 1
0
0
1
Bit 0
0
0
0
485

Related parts for S912XEQ384J3MALR