S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 701

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

19.3.2.5
The PWMCAE register contains eight control bits for the selection of center aligned outputs or left aligned
outputs for each PWM channel. If the CAEx bit is set to a one, the corresponding PWM output will be
center aligned. If the CAEx bit is cleared, the corresponding PWM output will be left aligned. See
Section 19.4.2.5, “Left Aligned Outputs”
detailed description of the PWM output modes.
Read: Anytime
Write: Anytime
19.3.2.6
The PWMCTL register provides for various control of the PWM module.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0004
Module Base + 0x0005
CAE[7:0]
Reset
Reset
Field
7–0
W
W
R
R
CON67
CAE7
Center Aligned Output Modes on Channels 7–0
0 Channels 7–0 operate in left aligned output mode.
1 Channels 7–0 operate in center aligned output mode.
PWM Center Align Enable Register (PWMCAE)
PWM Control Register (PWMCTL)
0
0
7
7
Write these bits only when the corresponding channel is disabled.
= Unimplemented or Reserved
CON45
Figure 19-7. PWM Center Align Enable Register (PWMCAE)
CAE6
PCKA2
0
0
6
6
Table 19-3. Clock A Prescaler Selects (continued)
1
Figure 19-8. PWM Control Register (PWMCTL)
MC9S12XE-Family Reference Manual Rev. 1.24
CON23
CAE5
PCKA1
0
0
5
5
1
and
Section 19.4.2.6, “Center Aligned Outputs”
CON01
CAE4
NOTE
0
0
PCKA0
4
4
1
Description
PSWAI
CAE3
0
0
3
3
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
Value of Clock A
Bus clock / 128
CAE2
PFRZ
0
0
2
2
CAE1
0
0
0
1
1
for a more
CAE0
0
0
0
0
0
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