S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 1139

• Manufacturer Part Number: S912XEQ384J3MALR
• Description: S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
• Manufacturer: Freescale Semiconductor

Chapter 29
1024 KByte Flash Module (S12XFTM1024K5V2)
Freescale Semiconductor
Revision
Number
V02.08
V02.09
V02.10
14 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
29.5.2/29-1200
29.4.2/29-1176
29.4.2/29-1176
29.3.2/29-1150
29.1/29-1140
29.4.2.12/29-
29.4.2.12/29-
29.4.2.12/29-
29.4.2.20/29-
29.6/29-1200
29.4.2.8/29-
29.3.2.1/29-
29.4.2.4/29-
29.4.2.7/29-
29.3.2.1/29-
29.4.1.2/29-
Sections
Affected
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1185
1185
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MC9S12XE-Family Reference Manual Rev. 1.24
Table 29-1. Revision History
- Changed terminology from ‘word program’ to “Program P-Flash’ in the BDM
unsecuring description,
- Added requirement that user not write any Flash module register during
execution of commands ‘Erase All Blocks’,
Flash’,
- Added statement that security is released upon successful completion of
command ‘Erase All Blocks’,
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Section 29.4.2.11
Section 29.5.2
Description of Changes
Section 29.4.2.8
Section
29.4.2.8, and ‘Unsecure
1139