S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 1233

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
The number of program/erase cycles for the EEPROM/D-Flash depends upon the partitioning of D-Flash
used for EEPROM Emulation. Defining RAM size allocated for EEE as EEE-RAM and D-Flash partition
allocated to EEE as EEE_NVM, the minimum number of program/erase cycles is specified depending
upon the ratio of EEE_NVM/EEE_RAM. The minimum ratio EEE_NVM/EEE_RAM =8.
Freescale Semiconductor
5. This represents the number of writes of updated data words to the EEE_RAM partition. Typical endurance performance for
6. This is equivalent to using a single byte or aligned word in the EEE_RAM with 32K D-Flash allocated for EEEPROM
# K Cycles
(Log)
1,000,000
the Emulated EEPROM array is based on typical endurance performance and the EEE algorithm implemented on this
product family. Spec. table quotes typical endurance evaluated at 25°C for this product family.
100,000
10,000
1,000
100
10
10
Figure A-2. Program/Erase Dependency on D-Flash Partitioning
100
MC9S12XE-Family Reference Manual Rev. 1.24
1000
10,000
100,000
EEE_NVM/EEE_RAM ratio
(Log)
Appendix A Electrical Characteristics
20% Spec Cycles
10 Year Data Retention
Spec Cycles
5 Year Data Retention
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