S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 713

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
and the counter value and causes the state of the output to change during the period. The starting polarity
of the output is also selectable on a per channel basis. Shown below in
for the PWM timer.
19.4.2.1
Each PWM channel has an enable bit (PWMEx) to start its waveform output. When any of the PWMEx
bits are set (PWMEx = 1), the associated PWM output signal is enabled immediately. However, the actual
PWM waveform is not available on the associated PWM output until its clock source begins its next cycle
due to the synchronization of PWMEx and the clock source. An exception to this is when channels are
concatenated. Refer to
On the front end of the PWM timer, the clock is enabled to the PWM circuit by the PWMEx bit being high.
There is an edge-synchronizing circuit to guarantee that the clock will only be enabled or disabled at an
edge. When the channel is disabled (PWMEx = 0), the counter for the channel does not count.
Freescale Semiconductor
Clock Source
PWMEx
(Clock Edge
PWM Enable
Sync)
Gate
The first PWM cycle after enabling the channel can be irregular.
Up/Down
Section 19.4.2.7, “PWM 16-Bit Functions”
8-Bit Counter
Figure 19-19. PWM Timer Channel Block Diagram
PWMCNTx
Q
Q
MC9S12XE-Family Reference Manual Rev. 1.24
Reset
T
R
NOTE
8-bit Compare =
8-bit Compare =
PWMPERx
PWMDTYx
CAEx
Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
for more detail.
Figure 19-19
T
R
Q
Q
PPOLx
From Port PWMP
M
U
Data Register
X
is the block diagram
M
U
X
To Pin
Driver
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