S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 364

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
Chapter 10 XGATE (S12XGATEV3)
10.3.1.6
The XGISP31 register is intended to point to the stack region that is used by XGATE channels of priority
3 to 1. Every time a thread of such priority is started, RISC core register R7 will be initialized with the
content of XGISP31.
Module Base +0x0006
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
10.3.1.7
The Vector Base Address Register
Section Figure 10-23., “XGATE Vector
Module Base +0x0006
Read: Anytime
Write: Only if XGATE requests are disabled (XGE = 0) and idle (XGCHID = $00))
364
Reset
Reset
XBISP74[15:1]
XBISP31[15:1]
W
W
R
R
Field
15–1
Field
15–1
15
15
0
1
XGATE Initial Stack Pointer for Interrupt Priorities 3 to 1 (XGISP31)
XGATE Vector Base Address Register (XGVBR)
Figure 10-8. XGATE Initial Stack Pointer for Interrupt Priorities 3 to 1 (XGISP31)
Initial Stack Pointer— The XGISP74 register holds the initial value of RISC core register R7, for threads of
priority 7 to 4.
Initial Stack Pointer— The XGISP31 register holds the initial value of RISC core register R7, for threads of
priority 3 to 1.
14
14
0
1
= Unimplemented or Reserved
= Unimplemented or Reserved
13
13
0
1
Figure 10-9. XGATE Vector Base Address Register (XGVBR)
12
12
0
1
MC9S12XE-Family Reference Manual Rev. 1.24
11
11
Table 10-7. XGISP74 Field Descriptions
0
Table 10-8. XGISP31 Field Descriptions
1
(Figure
10
10
0
1
Block).
10-9) determines the location of the XGATE vector block (see
0
1
9
9
XGISP31[15:1]
XGVBR[15:1]
0
0
8
8
Description
Description
0
0
7
7
6
0
6
0
0
0
5
5
0
0
4
4
0
0
3
3
Freescale Semiconductor
0
0
2
2
1
0
1
0
0
0
0
0
0
0

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