S912XEQ384J3MALR Freescale Semiconductor, S912XEQ384J3MALR Datasheet - Page 471

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S912XEQ384J3MALR

Manufacturer Part Number
S912XEQ384J3MALR
Description
S912XEQ Series 16 Bit 50 Mhz 384 KB Flash 24 KB Ram Microcontroller - LQFP-112
Manufacturer
Freescale Semiconductor
Datasheet
11.2
This section lists and describes the signals that connect off chip.
11.2.1
These pins provides operating voltage (V
the supply voltage to the IPLL to be independently bypassed. Even if IPLL usage is not required V
and V
11.2.2
RESET is an active low bidirectional reset pin. As an input it initializes the MCU asynchronously to a
known start-up state. As an open-drain output it indicates that an system reset (internal to MCU) has been
triggered.
Freescale Semiconductor
SSPLL
XCLKS
EXTAL
XTAL
Signal Description
V
RESET
must be connected to properly.
V
V
DDPLL
DDPLL
SSPLL
RESET
S12X_MMC
Oscillator
Monitor
Clock
Regulator
Voltage
, V
SSPLL
ICRG
MC9S12XE-Family Reference Manual Rev. 1.24
Figure 11-1. Block diagram of S12XECRG
OSCCLK
IPLL
Illegal Address Reset
Power on Reset
Low Voltage Reset
PLLCLK
CM Fail
DDPLL
) and ground (V
Clock and Reset Control
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
COP
Clock Quality
Generator
Registers
Checker
Reset
SSPLL
RTI
) for the IPLL circuitry. This allows
System Reset
Bus Clock
Core Clock
Oscillator Clock
Real Time Interrupt
PLL Lock Interrupt
Self Clock Mode
Interrupt
DDPLL
471

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