PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 74

no-image

PEF 2054 N V2.1

Manufacturer Part Number
PEF 2054 N V2.1
Description
IC INTERFACE CTRLR PCM LCC-44
Manufacturer
Infineon Technologies
Series
EPICr
Datasheet

Specifications of PEF 2054 N V2.1

Function
PCM Interface Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
9.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC
Includes
Board Controller, Channel Switching
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF2054NV2.1XT
PEF2054NV21XK
SP000057916
SP000075438
Semiconductor Group
4.2.6.2 Timer Register (TIMR)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: 00
The EPIC timer can be used for 3 different purposes: timer interrupt generation
(ISTA:TIG), FSC multiframe generation (CMD2:FC2..0 = 111) and last look period
generation.
SSR
TVAL6..0 Timer Value bits 6..0; the timer period, equal to (1+TVAL6..0)
The timer is started as soon as CMDR:ST is set to 1 and stopped by writing the TIMR
register or by selecting OMDR:OMS0 = 0.
bit 7
SSR
Signaling Sampling Rate.
0… the last look period is defined by TVAL6..0.
1… the last look period is fixed to 125 s.
programmed here. It can thus be adjusted within the range of 250 s up to
32 ms.
TVAL6
H
TVAL5
TVAL4
74
TVAL3
write
write
Detailed Register Description
TVAL2
address: C
OMDR:RBS = 0
address: 18
TVAL2
PEB 2055
PEF 2055
H
bit 0
250 s, is
H
TVAL0

Related parts for PEF 2054 N V2.1