PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 152

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PEF 2054 N V2.1

Manufacturer Part Number
PEF 2054 N V2.1
Description
IC INTERFACE CTRLR PCM LCC-44
Manufacturer
Infineon Technologies
Series
EPICr
Datasheet

Specifications of PEF 2054 N V2.1

Function
PCM Interface Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
9.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC
Includes
Board Controller, Channel Switching
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF2054NV2.1XT
PEF2054NV21XK
SP000057916
SP000075438
8 bit time slot:
32 kbit/s channel
32 kbit/s channel
16 kbit/s channel
16 kbit/s channel
16 kbit/s channel
16 kbit/s channel
5.4.1
All time slot assignments are programmed in the control memory (CM). Each line
(address) of the CM refers to one CFI time slot. The MAAR register, which is used to
address the CM, therefore specifies the CFI port and time slot to be switched. The data
field of the CM contains a pointer which points to a location in the data memory (DM).
The data memory contains the actual PCM data to be switched. The MADR register
contains the data to be copied to the CM data field. Since this data is interpreted as a
pointer to the DM, the MADR contents therefore specifies the PCM port and time slot to
be switched. The 4 bit CM code field must finally contain a value to declare the
corresponding CFI time slot as a switched channel (codes with a leading 0). This code
must be written at least once to the CM using the MACR register.
Since the CFI - PCM time slot assignment is programmed at the CFI side, it is possible
to switch a single downstream PCM time slot to several downstream CFI time slots. It is,
however, not possible to switch a single upstream CFI time slot to several upstream
PCM time slots.
If several upstream 64 kbit/s CFI time slots are assigned to the same upstream 64 kbit/s
PCM time slot, only the data of one CFI time slot will actually be switched since each
upstream connection will simply overwrite the DM data field. This switching mode can
therefore only effectively be used if the upstream switching is performed on different
subtime slot locations within the same PCM time slot (refer to chapter 5.4.2).
The following sequences can be used to program, verify, and cancel a CFI - PCM time
slot connection:
Semiconductor Group
CFI - PCM Time Slot Assignment
7
7
7
6
6
6
5
5
5
152
4
4
4
3
3
3
2
2
2
Application Hints
1
1
1
PEB 2055
PEF 2055
0
0
0

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