PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 54

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

Semiconductor Group
CMD1..0
CIS1..0
CFI Mode1,0.
Defines the actual number and configuration of the CFI ports.
CMD1..0 CFI
00
01
10
11
where N = number of time slots in a PCM frame
CFI Alternative Input Selection.
In CFI mode 1 and 2 CIS1..0 controls the assignment between logical and
physical receive pins. In CFI mode 0 and 3 CIS1,0 should be set to 0.
CFI
Mode
0
1
2
3
DU0
IN0
IN0
CIS0 = 0
IN
CIS0 = 0
I/O4
Mode
0
1
2
3
Port 0
Number
of
Logical
Ports
4 DU
(0..3)
2 DU
(0..1)
1 DU
8 bi (0..7) 128
DD0
OUT0
OUT0
OUT
I/O0
min.
128
128
128
CFI Data Rate
DU1
IN1
IN1
CIS1 = 0
not active tristate
I/O5
[kbit/s]
2048
4096
8192
1024
max.
Port 1
54
DD1
OUT1
OUT1
I/O1
Min. Required
CFI Data Rate
[kbit/s]
Relative to
PCM-Data Rate
32N/3
64N/3
64N/3
16N/3
DU2
IN2
IN0
CIS0 = 1
IN
CIS0 = 1
I/O6
Detailed Register Description
Port 2
Necessary
Reference
Clock (RCL)
2xDR
DR
0.5xDR
4xDR
DD2
OUT2
tristate
tristate
I/O2
DU3
IN3
IN1
CIS1 = 1
not active tristate
I/O7
DR, 2xDR
DCL-Output
Frequencies
CMD1:CSS0 = 0
DR, 2xDR
DR
DR
PEB 2055
PEF 2055
Port 3
DD3
OUT3
tristate
I/O3
1)